Portada

POWER-AWARE ARCHITECTING IBD

SPRINGER
10 / 2010
9789048176359
Inglés

Sinopsis

1 Introduction. 1.1 High-level system design. 1.2 Power as design constraint. 1.3 Application. 1.4 Outline. 2 Design trade-offs 2.1 Introduction. 2.2 Area estimation. 2.3 Delay estimation. 2.4 Power estimation. 2.5 Area, delay, power trade-offs. 2.6 Summary. 3 Architecting with uncertainties. 3.1 Introduction. 3.2 Application model. 3.3 Architecture class. 3.4 Hardware-software partitioning. 3.5 Extension to multiple algorithms. 3.6 Dealing with uncertainty. 3.7 C to SystemC conversion. 3.8 Summary. 4 Multi-carrier communications. 4.1 Introduction. 4.2 Multi-path channels. 4.3 Principles of multi-carrier modulation. 4.4 Optimal energy assignment. 4.5 Quantization level. 4.6 Clipping level. 4.7 Summary. 5 Application. 5.1 Introduction. 5.2 Transceiver specification. 5.3 Implementation alternatives. 5.4 Summary. 6 Conclusions. A Ubiquitous Communications. A.1 Applications. A.2 Necessities and consequences. A.3 Preliminary choices. B Mixed integer programming. B.1 Linear programming. B.2 Mixed integer programming. B.3 Boolean algebra. C Possibilistic linear programming. C.1 Introduction. C.2 Fuzzy objective coeffcients. C.3 Fuzzy objective, constraint and limit coeffcients. Bibliography. References. Index.

PVP
183,88